In electronic devices such as integrated circuits electrical interconnection at least in some portion of the device is made by forming metal conductors such as aluminum or copper conductors. Such conductors, often denominated runners, have relatively small cross sections that depend on one or more design rules that form the basis of the layout and manufacture of the device. For example, for devices having a design rule of 0.5 μm, aluminum runners generally have dimensions in the range 0.5 to 2.0 μm. Similarly in devices having a design rule of 0.13 μm, copper runners are generally employed and have dimensions in the range 0.4 to 12.0 μm. (Design rule in this context is the dimension of a critical component of the device such as the gate width of transistors in MOS integrated circuits.).
Generally in electronic devices the electrical interconnects required to produce desired functions are not producible using one layer of conductive runners. Indeed, in present day devices, up to 12 levels of conductive runners are employed. Each level is separated from an underlying level generally by a dielectric material commonly denominated an interlevel dielectric. For example, in the case of aluminum runners on a silicon wafer typically used in devices having design rules of 0.5 μm or larger, the aluminum runners are formed by blanket deposition of an aluminum layer with subsequent lithography and etching to produce the desired runner pattern. A dielectric material, such as a deposited silicon dioxide, is formed over the patterned runners and openings in the dielectric are made (generally by lithography and etching) where interconnection between layers of runners is needed. The process is repeated to produce further levels of patterned runners.
Typically, metals such as copper, tantalum, titanium, and tungsten, are used for metal runners in devices having design rules of 0.4 μm or less. However, runners such as those made from copper are not formed by blanket deposition of copper with subsequent etching because etching of copper has proven to be difficult. Instead, a dielectric layer is formed and trenches corresponding to the intended copper pattern are introduced by lithography and etching of this dielectric layer. The trenches are then filled, typically by electroplating deposition and then the copper overlying the dielectric is removed by chemical/mechanical polishing (CMP). Because copper rapidly diffuses through dielectrics such as silicon dioxide, the copper runner is typically surrounded by a barrier layer such as tantalum nitride to prevent such diffusion. (See Merchant, S. M., et. al., ECS Proceedings, Interconnect and Contact Metallization for ULSI, 2000, Vol. 99-31, pp. 91-98 for a description of processes suitable for introducing a desired barrier layer.)
Problems of electromigration and stress induced migration have plagued metal runners. (Electromigration is the movement of copper within a runner to form a void induced by the flow of current through the runner while stress migration involves formation of a void induced by relaxation of stress produced by phenomena such as thermal mismatch of materials.)
Electromigration and stress induced migration (collectively referred to, for pedagogic purposes, as migration) has become a growing concern for devices with design rules finer than 0.9 μm due to the relatively high operating temperatures encountered in many present day devices, e.g. temperatures in the range 80 to 110 and sometimes as high as 200° C. These substantially elevated temperatures, together with the temperature cycling produced when a device is turned on and off, enhances the tendency of the metal runners to undergo migration. Indeed, for such thermal cycling, differences in the coefficient of thermal expansion between adjacent materials, e.g. copper runners and interlevel dielectrics, produce relatively large stresses. Additionally, as design rules become finer, the metal runners become correspondingly smaller and thus the surface area of such runners increases relative to their volume also inducing greater stress.
Both copper and aluminum technologies have become relatively standard in the electronic industry, and therefore, changes in the materials employed to produce such devices are not easily made. Accordingly, the mitigation of migration through changes in the materials employed is not particularly desirable. Thus, an approach that reduces migration without changing the materials employed would be quite desirable.